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Texas Instruments /MSP432E401Y /SYSCTL /DIVSCLK

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Interpret as DIVSCLK

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SYSCTL_DIVSCLK_DIV 0 (SYSCTL_DIVSCLK_SRC_SYSCLK)SYSCTL_DIVSCLK_SRC 0 (SYSCTL_DIVSCLK_EN)SYSCTL_DIVSCLK_EN

SYSCTL_DIVSCLK_SRC=SYSCTL_DIVSCLK_SRC_SYSCLK

Description

Divisor and Source Clock Configuration

Fields

SYSCTL_DIVSCLK_DIV

Divisor Value
SYSCTL_DIVSCLK_SRC

Clock Source

0 (SYSCTL_DIVSCLK_SRC_SYSCLK): System Clock

1 (SYSCTL_DIVSCLK_SRC_PIOSC): PIOSC

2 (SYSCTL_DIVSCLK_SRC_MOSC): MOSC
SYSCTL_DIVSCLK_EN

DIVSCLK Enable

Links

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Register License

Software License Agreement

Texas Instruments (TI) is supplying this software for use solely and exclusively on TI’s microcontroller products. The software is owned by TI and/or its suppliers, and is protected under applicable copyright laws. You may not combine this software with “viral” open-source software in order to form a larger program.

THIS SOFTWARE IS PROVIDED “AS IS” AND WITH ALL FAULTS. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data